// Copyright 2020 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.

$assert BATCH_TILE % 4 == 0
$assert BATCH_TILE >= 4
$SIMD_TILE = BATCH_TILE // 4
$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
#include <assert.h>

#include <wasm_simd128.h>

#include "xnnpack/common.h"
#include "xnnpack/raddstoreexpminusmax.h"


$ISA = "wasmrelaxedsimd" if FMA else "wasmsimd"
void xnn_f32_raddstoreexpminusmax_ukernel__${ISA}_rr2_p5_u${BATCH_TILE}${"" if ACCUMULATORS == 1 else "_acc%d" % ACCUMULATORS}(
    size_t batch,
    const float* input,
    const float* max,
    float* output,
    float* sum,
    const void* params) XNN_OOB_READS
{
  assert(batch != 0);
  assert(batch % sizeof(float) == 0);
  assert(input != NULL);
  assert(max != NULL);
  assert(output != NULL);
  assert(sum != NULL);

  const v128_t vlog2e = wasm_f32x4_const_splat(0x1.715476p+0f);
  const v128_t vmagic_bias = wasm_f32x4_const_splat(0x1.8000FEp23f);
  const v128_t vminus_ln2_hi = wasm_f32x4_const_splat(-0x1.62E400p-1f);
  const v128_t vminus_ln2_lo = wasm_f32x4_const_splat(-0x1.7F7D1Cp-20f);
  const v128_t vc5 = wasm_f32x4_const_splat(0x1.0F9F9Cp-7f);
  const v128_t vc4 = wasm_f32x4_const_splat(0x1.573A1Ap-5f);
  const v128_t vc3 = wasm_f32x4_const_splat(0x1.555A80p-3f);
  const v128_t vc2 = wasm_f32x4_const_splat(0x1.FFFDC6p-2f);
  const v128_t vc1 = wasm_f32x4_const_splat(0x1.FFFFF6p-1f);
  const v128_t vdenorm_cutoff = wasm_f32x4_const_splat(-0x1.5D589Ep6f);

  XNN_FORCE_REALIZATION(vlog2e);
  XNN_FORCE_REALIZATION(vmagic_bias);
  XNN_FORCE_REALIZATION(vminus_ln2_hi);
  XNN_FORCE_REALIZATION(vminus_ln2_lo);
  XNN_FORCE_REALIZATION(vc5);
  XNN_FORCE_REALIZATION(vc4);
  XNN_FORCE_REALIZATION(vc3);
  XNN_FORCE_REALIZATION(vc2);
  XNN_FORCE_REALIZATION(vc1);
  XNN_FORCE_REALIZATION(vdenorm_cutoff);

  const v128_t vi_max = wasm_v128_load32_splat(max);

  v128_t vacc0 = wasm_f32x4_const_splat(0.0f);
  $for K in range(1, ACCUMULATORS):
    v128_t vacc${K} = vacc0;
  for (; batch >= ${BATCH_TILE} * sizeof(float); batch -= ${BATCH_TILE} * sizeof(float)) {
    // Load ${BATCH_TILE} (${SIMD_TILE}x4) inputs at a time.
    const v128_t vi${ABC[0:4]} = wasm_v128_load(input);
    $for N in range(4, BATCH_TILE, 4):
      const v128_t vi${ABC[N:N+4]} = wasm_v128_load(input + ${N});
    input += ${BATCH_TILE};

    $for N in range(0, BATCH_TILE, 4):
      const v128_t vx${ABC[N:N+4]} = wasm_f32x4_sub(vi${ABC[N:N+4]}, vi_max);

    $for N in range(0, BATCH_TILE, 4):
      $if FMA:
        v128_t vn${ABC[N:N+4]} = wasm_f32x4_relaxed_madd(vx${ABC[N:N+4]}, vlog2e, vmagic_bias);
      $else:
        v128_t vn${ABC[N:N+4]} = wasm_f32x4_add(wasm_f32x4_mul(vx${ABC[N:N+4]}, vlog2e), vmagic_bias);

    $for N in range(0, BATCH_TILE, 4):
      const v128_t vs${ABC[N:N+4]} = wasm_i32x4_shl(vn${ABC[N:N+4]}, 23);

    $for N in range(0, BATCH_TILE, 4):
      vn${ABC[N:N+4]} = wasm_f32x4_sub(vn${ABC[N:N+4]}, vmagic_bias);

    $for N in range(0, BATCH_TILE, 4):
      $if FMA:
        v128_t vt${ABC[N:N+4]} = wasm_f32x4_relaxed_madd(vn${ABC[N:N+4]}, vminus_ln2_hi, vx${ABC[N:N+4]});
      $else:
        v128_t vt${ABC[N:N+4]} = wasm_f32x4_add(wasm_f32x4_mul(vn${ABC[N:N+4]}, vminus_ln2_hi), vx${ABC[N:N+4]});

    $for N in range(0, BATCH_TILE, 4):
      $if FMA:
        vt${ABC[N:N+4]} = wasm_f32x4_relaxed_madd(vn${ABC[N:N+4]}, vminus_ln2_lo, vt${ABC[N:N+4]});
      $else:
        vt${ABC[N:N+4]} = wasm_f32x4_add(wasm_f32x4_mul(vn${ABC[N:N+4]}, vminus_ln2_lo), vt${ABC[N:N+4]});

    $for N in range(0, BATCH_TILE, 4):
      $if FMA:
        v128_t vp${ABC[N:N+4]} = wasm_f32x4_relaxed_madd(vc5, vt${ABC[N:N+4]}, vc4);
      $else:
        v128_t vp${ABC[N:N+4]} = wasm_f32x4_add(wasm_f32x4_mul(vc5, vt${ABC[N:N+4]}), vc4);

    $for N in range(0, BATCH_TILE, 4):
      $if FMA:
        vp${ABC[N:N+4]} = wasm_f32x4_relaxed_madd(vp${ABC[N:N+4]}, vt${ABC[N:N+4]}, vc3);
      $else:
        vp${ABC[N:N+4]} = wasm_f32x4_add(wasm_f32x4_mul(vp${ABC[N:N+4]}, vt${ABC[N:N+4]}), vc3);

    $for N in range(0, BATCH_TILE, 4):
      $if FMA:
        vp${ABC[N:N+4]} = wasm_f32x4_relaxed_madd(vp${ABC[N:N+4]}, vt${ABC[N:N+4]}, vc2);
      $else:
        vp${ABC[N:N+4]} = wasm_f32x4_add(wasm_f32x4_mul(vp${ABC[N:N+4]}, vt${ABC[N:N+4]}), vc2);

    $for N in range(0, BATCH_TILE, 4):
      $if FMA:
        vp${ABC[N:N+4]} = wasm_f32x4_relaxed_madd(vp${ABC[N:N+4]}, vt${ABC[N:N+4]}, vc1);
      $else:
        vp${ABC[N:N+4]} = wasm_f32x4_add(wasm_f32x4_mul(vp${ABC[N:N+4]}, vt${ABC[N:N+4]}), vc1);

    $for N in range(0, BATCH_TILE, 4):
      vt${ABC[N:N+4]} = wasm_f32x4_mul(vt${ABC[N:N+4]}, vs${ABC[N:N+4]});

    $for N in range(0, BATCH_TILE, 4):
      $if FMA:
        v128_t vf${ABC[N:N+4]} = wasm_f32x4_relaxed_madd(vt${ABC[N:N+4]}, vp${ABC[N:N+4]}, vs${ABC[N:N+4]});
      $else:
        v128_t vf${ABC[N:N+4]} = wasm_f32x4_add(wasm_f32x4_mul(vt${ABC[N:N+4]}, vp${ABC[N:N+4]}), vs${ABC[N:N+4]});

    $for N in range(0, BATCH_TILE, 4):
      vf${ABC[N:N+4]} = wasm_v128_andnot(vf${ABC[N:N+4]}, wasm_f32x4_lt(vx${ABC[N:N+4]}, vdenorm_cutoff));

    wasm_v128_store(output, vf${ABC[0:4]});
    $for N in range(4, BATCH_TILE, 4):
      wasm_v128_store(output + ${N}, vf${ABC[N:N+4]});
    output += ${BATCH_TILE};

    $for N in range(0, BATCH_TILE, 4):
      vacc${N % ACCUMULATORS} = wasm_f32x4_add(vacc${N % ACCUMULATORS}, vf${ABC[N:N+4]});
  }
  $if ACCUMULATORS > 1:
    // Add up all accumulators to vacc0
    $ACC_SLICE = 1
    $while ACC_SLICE < ACCUMULATORS:
      $for A in range(0, ACCUMULATORS, ACC_SLICE * 2):
        $if A + ACC_SLICE < ACCUMULATORS:
          vacc${A} = wasm_f32x4_add(vacc${A}, vacc${A + ACC_SLICE});
      $ACC_SLICE *= 2

  v128_t vacc = vacc0;
  for (; batch >= 4 * sizeof(float); batch -= 4 * sizeof(float)) {
    const v128_t vi = wasm_v128_load(input);
    input += 4;

    const v128_t vx = wasm_f32x4_sub(vi, vi_max);

    $if FMA:
      v128_t vn = wasm_f32x4_relaxed_madd(vx, vlog2e, vmagic_bias);
    $else:
      v128_t vn = wasm_f32x4_add(wasm_f32x4_mul(vx, vlog2e), vmagic_bias);

    const v128_t vs = wasm_i32x4_shl(vn, 23);

    vn = wasm_f32x4_sub(vn, vmagic_bias);

    $if FMA:
      v128_t vt = wasm_f32x4_relaxed_madd(vn, vminus_ln2_hi, vx);
      vt = wasm_f32x4_relaxed_madd(vn, vminus_ln2_lo, vt);
    $else:
      v128_t vt = wasm_f32x4_add(wasm_f32x4_mul(vn, vminus_ln2_hi), vx);
      vt = wasm_f32x4_add(wasm_f32x4_mul(vn, vminus_ln2_lo), vt);

    $if FMA:
      v128_t vp = wasm_f32x4_relaxed_madd(vc5, vt, vc4);
      vp = wasm_f32x4_relaxed_madd(vp, vt, vc3);
      vp = wasm_f32x4_relaxed_madd(vp, vt, vc2);
      vp = wasm_f32x4_relaxed_madd(vp, vt, vc1);
    $else:
      v128_t vp = wasm_f32x4_add(wasm_f32x4_mul(vc5, vt), vc4);
      vp = wasm_f32x4_add(wasm_f32x4_mul(vp, vt), vc3);
      vp = wasm_f32x4_add(wasm_f32x4_mul(vp, vt), vc2);
      vp = wasm_f32x4_add(wasm_f32x4_mul(vp, vt), vc1);

    vt = wasm_f32x4_mul(vt, vs);
    $if FMA:
      v128_t vf = wasm_f32x4_relaxed_madd(vt, vp, vs);
    $else:
      v128_t vf = wasm_f32x4_add(wasm_f32x4_mul(vt, vp), vs);

    vf = wasm_v128_andnot(vf, wasm_f32x4_lt(vx, vdenorm_cutoff));

    wasm_v128_store(output, vf);
    output += 4;

    vacc = wasm_f32x4_add(vacc, vf);
  }
  vacc = wasm_f32x4_add(vacc, wasm_v64x2_shuffle(vacc, vacc, 1, 1));
  float vsum = wasm_f32x4_extract_lane(vacc, 0) + wasm_f32x4_extract_lane(vacc, 1);
  if (batch != 0) {
    assert(batch >= 1 * sizeof(float));
    assert(batch <= 3 * sizeof(float));

    const v128_t vi = wasm_v128_load(input);

    const v128_t vx = wasm_f32x4_sub(vi, vi_max);

    $if FMA:
      v128_t vn = wasm_f32x4_relaxed_madd(vx, vlog2e, vmagic_bias);
    $else:
      v128_t vn = wasm_f32x4_add(wasm_f32x4_mul(vx, vlog2e), vmagic_bias);

    const v128_t vs = wasm_i32x4_shl(vn, 23);

    vn = wasm_f32x4_sub(vn, vmagic_bias);

    $if FMA:
      v128_t vt = wasm_f32x4_relaxed_madd(vn, vminus_ln2_hi, vx);
      vt = wasm_f32x4_relaxed_madd(vn, vminus_ln2_lo, vt);
    $else:
      v128_t vt = wasm_f32x4_add(wasm_f32x4_mul(vn, vminus_ln2_hi), vx);
      vt = wasm_f32x4_add(wasm_f32x4_mul(vn, vminus_ln2_lo), vt);

    $if FMA:
      v128_t vp = wasm_f32x4_relaxed_madd(vc5, vt, vc4);
      vp = wasm_f32x4_relaxed_madd(vp, vt, vc3);
      vp = wasm_f32x4_relaxed_madd(vp, vt, vc2);
      vp = wasm_f32x4_relaxed_madd(vp, vt, vc1);
    $else:
      v128_t vp = wasm_f32x4_add(wasm_f32x4_mul(vc5, vt), vc4);
      vp = wasm_f32x4_add(wasm_f32x4_mul(vp, vt), vc3);
      vp = wasm_f32x4_add(wasm_f32x4_mul(vp, vt), vc2);
      vp = wasm_f32x4_add(wasm_f32x4_mul(vp, vt), vc1);

    vt = wasm_f32x4_mul(vt, vs);
    $if FMA:
      v128_t vf = wasm_f32x4_relaxed_madd(vt, vp, vs);
    $else:
      v128_t vf = wasm_f32x4_add(wasm_f32x4_mul(vt, vp), vs);

    vf = wasm_v128_andnot(vf, wasm_f32x4_lt(vx, vdenorm_cutoff));

    if (batch & (2 * sizeof(float))) {
      wasm_v128_store64_lane(output, vf, 0);
      output += 2;

      vsum += wasm_f32x4_extract_lane(vf, 0) + wasm_f32x4_extract_lane(vf, 1);
      vf = wasm_v64x2_shuffle(vf, vf, 1, 1);
    }
    if (batch & (1 * sizeof(float))) {
      wasm_v128_store32_lane(output, vf, 0);
      vsum += wasm_f32x4_extract_lane(vf, 0);
    }
  }
  *sum = vsum;
}
