// Copyright 2021 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.

$assert DATATYPE in ["QS8", "QU8"]
$assert BATCH_TILE % 16 == 0
$assert BATCH_TILE >= 16
$SIMD_TILE = BATCH_TILE // 4
$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
#include <assert.h>

#include <immintrin.h>

#include "xnnpack/common.h"
#include "xnnpack/intrinsics-polyfill.h"
#include "xnnpack/vcvt.h"


$XINT8_T = {"QS8": "int8_t", "QU8": "uint8_t"}[DATATYPE]
$_MM512_PACKXS_EPI16 = {"QS8": "_mm512_packs_epi16", "QU8": "_mm512_packus_epi16"}[DATATYPE]
$_MM256_PACKXS_EPI16 = {"QS8": "_mm256_packs_epi16", "QU8": "_mm256_packus_epi16"}[DATATYPE]
$_MM_PACKXS_EPI16 = {"QS8": "_mm_packs_epi16", "QU8": "_mm_packus_epi16"}[DATATYPE]
$OUTPUT_MAX = {"QS8": 127, "QU8": 255}[DATATYPE]
void xnn_f32_${DATATYPE.lower()}_vcvt_ukernel__avx512skx_u${BATCH_TILE}(
    size_t batch,
    const float* input,
    ${XINT8_T}* output,
    const struct xnn_f32_${DATATYPE.lower()}_cvt_params params[restrict XNN_MIN_ELEMENTS(1)])
{
  assert(batch != 0);
  assert(batch % sizeof(float) == 0);
  assert(input != NULL);
  assert(output != NULL);

  $if SIMD_TILE > 8:
    XNN_ALIGN(64) static const uint32_t shuffle512_mask[16] = {0, 4, 8, 12, 1, 5, 9, 13, 2, 6, 10, 14, 3, 7, 11, 15};

  $if SIMD_TILE % 16 != 0:
    XNN_ALIGN(32) static const uint32_t shuffle256_mask[8] = {0, 4, 2, 6, 1, 5, 3, 7};

  const __m512 vscale = _mm512_set1_ps(params->scalar.scale);
  const __m512 voutput_max_less_zero_point = _mm512_set1_ps((float) ((int32_t) ${OUTPUT_MAX} - (int32_t) params->scalar.output_zero_point));
  const __m512i voutput_zero_point = _mm512_set1_epi16(params->scalar.output_zero_point);
  $if SIMD_TILE > 8:
    const __m512i vshuffle512_mask = _mm512_load_si512(shuffle512_mask);
  $if SIMD_TILE % 16 != 0:
    const __m256i vshuffle256_mask = _mm256_load_si256((const __m256i*) shuffle256_mask);
  XNN_FORCE_REALIZATION(vscale);
  XNN_FORCE_REALIZATION(voutput_max_less_zero_point);
  XNN_FORCE_REALIZATION(voutput_zero_point);
  for (; batch >= ${BATCH_TILE} * sizeof(float); batch -= ${BATCH_TILE} * sizeof(float)) {
    __m512 vx0123 = _mm512_loadu_ps(input);
    $for N in range(4, SIMD_TILE, 4):
      __m512 vx${ABC[N:N+4]} = _mm512_loadu_ps(input + ${N * 4});
    input += ${BATCH_TILE};

    $for N in range(0, SIMD_TILE, 4):
      vx${ABC[N:N+4]} = _mm512_mul_ps(vx${ABC[N:N+4]}, vscale);

    $for N in range(0, SIMD_TILE, 4):
      vx${ABC[N:N+4]} = _mm512_min_ps(vx${ABC[N:N+4]}, voutput_max_less_zero_point);

    $for N in range(0, SIMD_TILE, 4):
      const __m512i vacc${ABC[N:N+4]} = _mm512_cvtps_epi32(vx${ABC[N:N+4]});

    $for N in range(0, SIMD_TILE, 8):
      __m512i vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]} = _mm512_packs_epi32(vacc${ABC[N:N+4]}, vacc${ABC[N+4:N+8]});

    $for N in range(0, SIMD_TILE, 8):
      vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]} = _mm512_adds_epi16(vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]}, voutput_zero_point);

    $for N in range(0, SIMD_TILE, 16):
      $if N + 8 < SIMD_TILE:
        __m512i vy${ABC[N]}${ABC[N+4]}${ABC[N+8]}${ABC[N+12]}${ABC[N+1]}${ABC[N+5]}${ABC[N+9]}${ABC[N+13]}${ABC[N+2]}${ABC[N+6]}${ABC[N+10]}${ABC[N+14]}${ABC[N+3]}${ABC[N+7]}${ABC[N+11]}${ABC[N+15]} = ${_MM512_PACKXS_EPI16}(vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]}, vacc${ABC[N+8]}${ABC[N+12]}${ABC[N+9]}${ABC[N+13]}${ABC[N+10]}${ABC[N+14]}${ABC[N+11]}${ABC[N+15]});
      $else:
        __m256i vy${ABC[N]}${ABC[N+4]}${ABC[N+2]}${ABC[N+6]}${ABC[N+1]}${ABC[N+5]}${ABC[N+3]}${ABC[N+7]} = ${_MM256_PACKXS_EPI16}(_mm512_castsi512_si256(vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]}), _mm512_extracti32x8_epi32(vacc${ABC[N]}${ABC[N+4]}${ABC[N+1]}${ABC[N+5]}${ABC[N+2]}${ABC[N+6]}${ABC[N+3]}${ABC[N+7]}, 1));

    $for N in range(0, SIMD_TILE, 16):
      $if N + 8 < SIMD_TILE:
        const __m512i vy${ABC[N:N+16]} = _mm512_permutexvar_epi32(vshuffle512_mask, vy${ABC[N]}${ABC[N+4]}${ABC[N+8]}${ABC[N+12]}${ABC[N+1]}${ABC[N+5]}${ABC[N+9]}${ABC[N+13]}${ABC[N+2]}${ABC[N+6]}${ABC[N+10]}${ABC[N+14]}${ABC[N+3]}${ABC[N+7]}${ABC[N+11]}${ABC[N+15]});
      $else:
        const __m256i vy${ABC[N:N+8]} = _mm256_permutevar8x32_epi32(vy${ABC[N]}${ABC[N+4]}${ABC[N+2]}${ABC[N+6]}${ABC[N+1]}${ABC[N+5]}${ABC[N+3]}${ABC[N+7]}, vshuffle256_mask);

    $if SIMD_TILE > 8:
      _mm512_storeu_si512(output, vy${ABC[0:16]});
    $else:
      _mm256_storeu_si256((__m256i*) output, vy${ABC[0:8]});
    $for N in range(16, SIMD_TILE, 16):
      $if N + 8 < SIMD_TILE:
        _mm512_storeu_si512(output + ${N * 4}, vy${ABC[N:N+16]});
      $else:
        _mm256_storeu_si256((__m256i*) (output + ${N * 4}), vy${ABC[N:N+8]});
    output += ${BATCH_TILE};
  }
  for (; batch >= 16 * sizeof(float); batch -= 16 * sizeof(float)) {
    __m512 vx0123 = _mm512_loadu_ps(input);
    vx0123 = _mm512_mul_ps(vx0123, vscale);
    vx0123 = _mm512_min_ps(vx0123, voutput_max_less_zero_point);
    input += 16;

    const __m512i vacc0123 = _mm512_cvtps_epi32(vx0123);

    __m256i vacc0213 = _mm256_packs_epi32(_mm512_castsi512_si256(vacc0123), _mm512_extracti32x8_epi32(vacc0123, 1));
    vacc0213 = _mm256_adds_epi16(vacc0213, _mm512_castsi512_si256(voutput_zero_point));
    const __m128i vy0213 = ${_MM_PACKXS_EPI16}(_mm256_castsi256_si128(vacc0213), _mm256_extracti128_si256(vacc0213, 1));
    __m128i vy0123 = _mm_shuffle_epi32(vy0213, _MM_SHUFFLE(3, 1, 2, 0));

    _mm_storeu_si128((__m128i*) output, vy0123);
    output += 16;
  }
  if XNN_UNLIKELY(batch != 0) {
    assert(batch >= 1 * sizeof(float));
    assert(batch <= 15 * sizeof(float));

    // Prepare mask for valid elements (depends on batch).
    batch >>= XNN_LOG2_SIZEOF_FLOAT;
    const __mmask16 vmask = _cvtu32_mask16((uint32_t) ((UINT32_C(1) << batch) - UINT32_C(1)));

    __m512 vx0123 = _mm512_maskz_loadu_ps(vmask, input);
    vx0123 = _mm512_mul_ps(vx0123, vscale);
    vx0123 = _mm512_min_ps(vx0123, voutput_max_less_zero_point);

    const __m512i vacc0123 = _mm512_cvtps_epi32(vx0123);

    __m256i vacc0213 = _mm256_packs_epi32(_mm512_castsi512_si256(vacc0123), _mm512_extracti32x8_epi32(vacc0123, 1));
    vacc0213 = _mm256_adds_epi16(vacc0213, _mm512_castsi512_si256(voutput_zero_point));
    const __m128i vy0213 = ${_MM_PACKXS_EPI16}(_mm256_castsi256_si128(vacc0213), _mm256_extracti128_si256(vacc0213, 1));
    __m128i vy0123 = _mm_shuffle_epi32(vy0213, _MM_SHUFFLE(3, 1, 2, 0));

    _mm_mask_storeu_epi8(output, vmask, vy0123);
  }
}