"""
Microkernel filenames lists for neonfp16arith.

Auto-generated file. Do not edit!
  Generator: tools/update-microkernels.py
"""

PROD_NEONFP16ARITH_MICROKERNEL_SRCS = [
    "src/f16-avgpool/f16-avgpool-9p8x-minmax-neonfp16arith-c8.c",
    "src/f16-avgpool/f16-avgpool-9x-minmax-neonfp16arith-c8.c",
    "src/f16-conv-hwc2chw/f16-conv-hwc2chw-3x3s2p1c3x4-neonfp16arith-2x2.c",
    "src/f16-dwconv/gen/f16-dwconv-3p16c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-4p16c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-9p8c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-9p16c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-25p8c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3p1-minmax-neonfp16arith-2x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3s2p1-minmax-neonfp16arith-1x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-1x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-1x8.c",
    "src/f16-f32acc-rdsum/gen/f16-f32acc-rdsum-7p7x-minmax-neonfp16arith-c16.c",
    "src/f16-f32acc-rsum/gen/f16-f32acc-rsum-neonfp16arith-u32-acc4.c",
    "src/f16-gemm/gen/f16-gemm-1x8-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemm-1x16-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemm-6x8-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemm-6x16-minmax-neonfp16arith-ld64.c",
    "src/f16-ibilinear-chw/gen/f16-ibilinear-chw-neonfp16arith-p8.c",
    "src/f16-ibilinear/gen/f16-ibilinear-neonfp16arith-c8.c",
    "src/f16-igemm/gen/f16-igemm-1x8-minmax-neonfp16arith-ld64.c",
    "src/f16-igemm/gen/f16-igemm-1x16-minmax-neonfp16arith-ld64.c",
    "src/f16-igemm/gen/f16-igemm-6x8-minmax-neonfp16arith-ld64.c",
    "src/f16-igemm/gen/f16-igemm-6x16-minmax-neonfp16arith-ld64.c",
    "src/f16-maxpool/f16-maxpool-9p8x-minmax-neonfp16arith-c8.c",
    "src/f16-pavgpool/f16-pavgpool-9p8x-minmax-neonfp16arith-c8.c",
    "src/f16-pavgpool/f16-pavgpool-9x-minmax-neonfp16arith-c8.c",
    "src/f16-qs8-vcvt/gen/f16-qs8-vcvt-neonfp16arith-u32.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u32.c",
    "src/f16-rminmax/gen/f16-rmax-neonfp16arith-u32-acc4.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u32-acc4.c",
    "src/f16-spmm/gen/f16-spmm-32x1-minmax-neonfp16arith-pipelined.c",
    "src/f16-vbinary/gen/f16-vadd-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vaddc-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vmax-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vmaxc-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vmin-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vminc-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vmul-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vmulc-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vprelu-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vpreluc-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vrpreluc-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vrsubc-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vsqrdiff-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vsqrdiffc-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vsub-neonfp16arith-u16.c",
    "src/f16-vbinary/gen/f16-vsubc-neonfp16arith-u16.c",
    "src/f16-vclamp/gen/f16-vclamp-neonfp16arith-u16.c",
    "src/f16-vcmul/gen/f16-vcmul-neonfp16arith-u16.c",
    "src/f16-velu/gen/f16-velu-neonfp16arith-rr1-p3-u16.c",
    "src/f16-vhswish/gen/f16-vhswish-neonfp16arith-u16.c",
    "src/f16-vlrelu/gen/f16-vlrelu-neonfp16arith-u16.c",
    "src/f16-vmulcaddc/gen/f16-vmulcaddc-c8-minmax-neonfp16arith-2x.c",
    "src/f16-vrnd/gen/f16-vrndd-neonfp16arith-u16.c",
    "src/f16-vrnd/gen/f16-vrndne-neonfp16arith-u16.c",
    "src/f16-vrnd/gen/f16-vrndu-neonfp16arith-u16.c",
    "src/f16-vrnd/gen/f16-vrndz-neonfp16arith-u16.c",
    "src/f16-vrsqrt/gen/f16-vrsqrt-neonfp16arith-rsqrt-u16.c",
    "src/f16-vsigmoid/gen/f16-vsigmoid-neonfp16arith-rr2-p2-nr1fma-u32.c",
    "src/f16-vsigmoid/gen/f16-vsigmoid-neonfp16arith-rr2-p2-nr1recps-u16.c",
    "src/f16-vsqrt/gen/f16-vsqrt-neonfp16arith-nr1fma1adj-u8.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-nr1fma-u32.c",
    "src/f16-vunary/gen/f16-vabs-neonfp16arith-u16.c",
    "src/f16-vunary/gen/f16-vneg-neonfp16arith-u16.c",
    "src/f16-vunary/gen/f16-vsqr-neonfp16arith-u16.c",
    "src/qd8-f16-qb4w-gemm/gen/qd8-f16-qb4w-gemm-1x16-minmax-neonfp16arith-mlal-lane.c",
    "src/qd8-f16-qb4w-gemm/gen/qd8-f16-qb4w-gemm-6x16-minmax-neonfp16arith-mlal-lane.c",
    "src/qd8-f16-qc4w-gemm/gen/qd8-f16-qc4w-gemm-1x16-minmax-neonfp16arith-mlal-lane.c",
    "src/qd8-f16-qc4w-gemm/gen/qd8-f16-qc4w-gemm-6x16-minmax-neonfp16arith-mlal-lane.c",
    "src/qd8-f16-qc8w-gemm/gen/qd8-f16-qc8w-gemm-1x8c2s4-minmax-neonfp16arith.c",
    "src/qd8-f16-qc8w-gemm/gen/qd8-f16-qc8w-gemm-2x8c2s4-minmax-neonfp16arith.c",
    "src/qd8-f16-qc8w-igemm/gen/qd8-f16-qc8w-igemm-1x8c2s4-minmax-neonfp16arith-mlal.c",
    "src/qd8-f16-qc8w-igemm/gen/qd8-f16-qc8w-igemm-2x8c2s4-minmax-neonfp16arith-mlal.c",
    "src/qs8-f16-vcvt/gen/qs8-f16-vcvt-neonfp16arith-u32.c",
]

NON_PROD_NEONFP16ARITH_MICROKERNEL_SRCS = [
    "src/f16-dwconv/gen/f16-dwconv-3p8c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-3p8c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-3p16c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-3p32c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-3p32c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-4p8c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-4p8c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-4p16c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-4p32c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-4p32c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-5f5m5l8c8s4r-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-5f5m5l8c8s4r-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-5f5m5l16c8s4r-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-5f5m5l16c8s4r-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-5f5m5l32c8s4r-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-5f5m5l32c8s4r-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-6f6m7l8c8s4r-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-6f6m7l8c8s4r-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-6f6m7l16c8s4r-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-6f6m7l16c8s4r-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-6f6m7l32c8s4r-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-6f6m7l32c8s4r-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-8f8m9l8c8s4r-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-8f8m9l8c8s4r-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-8f8m9l16c8s4r-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-8f8m9l16c8s4r-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-8f8m9l32c8s4r-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-8f8m9l32c8s4r-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-9p8c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-9p16c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-9p32c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-9p32c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-25p8c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-25p16c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-25p16c-minmax-neonfp16arith.c",
    "src/f16-dwconv/gen/f16-dwconv-25p32c-minmax-neonfp16arith-acc2.c",
    "src/f16-dwconv/gen/f16-dwconv-25p32c-minmax-neonfp16arith.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3p1-minmax-neonfp16arith-1x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3p1-minmax-neonfp16arith-1x8-acc3.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3p1-minmax-neonfp16arith-1x8-acc4.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3p1-minmax-neonfp16arith-1x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3p1-minmax-neonfp16arith-2x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3p1-minmax-neonfp16arith-3x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3p1-minmax-neonfp16arith-4x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3p1-minmax-neonfp16arith-5x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3p1-minmax-neonfp16arith-6x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3s2p1-minmax-neonfp16arith-1x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3s2p1-minmax-neonfp16arith-1x8-acc3.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3s2p1-minmax-neonfp16arith-1x8-acc4.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3s2p1-minmax-neonfp16arith-2x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3s2p1-minmax-neonfp16arith-2x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3s2p1-minmax-neonfp16arith-3x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-3x3s2p1-minmax-neonfp16arith-4x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-1x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-1x8-acc3.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-1x8-acc4.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-1x8-acc5.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-2x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-2x8-acc3.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-2x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-3x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-3x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-4x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-4x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5p2-minmax-neonfp16arith-5x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-1x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-1x8-acc3.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-1x8-acc4.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-1x8-acc5.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-2x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-2x8-acc3.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-2x8.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-3x8-acc2.c",
    "src/f16-dwconv2d-chw/gen/f16-dwconv2d-chw-5x5s2p2-minmax-neonfp16arith-3x8.c",
    "src/f16-f32acc-rdsum/gen/f16-f32acc-rdsum-7p7x-minmax-neonfp16arith-c32.c",
    "src/f16-f32acc-rdsum/gen/f16-f32acc-rdsum-7p7x-minmax-neonfp16arith-c64.c",
    "src/f16-f32acc-rsum/gen/f16-f32acc-rsum-neonfp16arith-u4.c",
    "src/f16-f32acc-rsum/gen/f16-f32acc-rsum-neonfp16arith-u8.c",
    "src/f16-f32acc-rsum/gen/f16-f32acc-rsum-neonfp16arith-u16-acc2.c",
    "src/f16-f32acc-rsum/gen/f16-f32acc-rsum-neonfp16arith-u24-acc3.c",
    "src/f16-f32acc-rsum/gen/f16-f32acc-rsum-neonfp16arith-u32-acc2.c",
    "src/f16-gemm/gen/f16-gemm-4x8-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemm-4x16-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemm-8x8-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemm-8x16-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemminc-1x8-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemminc-1x16-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemminc-4x8-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemminc-4x16-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemminc-6x8-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemminc-6x16-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemminc-8x8-minmax-neonfp16arith-ld64.c",
    "src/f16-gemm/gen/f16-gemminc-8x16-minmax-neonfp16arith-ld64.c",
    "src/f16-ibilinear-chw/gen/f16-ibilinear-chw-neonfp16arith-p4.c",
    "src/f16-ibilinear-chw/gen/f16-ibilinear-chw-neonfp16arith-p16.c",
    "src/f16-ibilinear/gen/f16-ibilinear-neonfp16arith-c16.c",
    "src/f16-igemm/gen/f16-igemm-4x8-minmax-neonfp16arith-ld64.c",
    "src/f16-igemm/gen/f16-igemm-4x16-minmax-neonfp16arith-ld64.c",
    "src/f16-igemm/gen/f16-igemm-8x8-minmax-neonfp16arith-ld64.c",
    "src/f16-igemm/gen/f16-igemm-8x16-minmax-neonfp16arith-ld64.c",
    "src/f16-qs8-vcvt/gen/f16-qs8-vcvt-neonfp16arith-u8.c",
    "src/f16-qs8-vcvt/gen/f16-qs8-vcvt-neonfp16arith-u16.c",
    "src/f16-qs8-vcvt/gen/f16-qs8-vcvt-neonfp16arith-u24.c",
    "src/f16-qs8-vcvt/gen/f16-qs8-vcvt-neonfp16arith-u64.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u32-acc2.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u32-acc4.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u40-acc2.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u40-acc5.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u40.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u48-acc2.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u48-acc3.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u48.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u64-acc2.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u64-acc4.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u64.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u72-acc3.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u72.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u80-acc2.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u80-acc5.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u80.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u96-acc2.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u96-acc3.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u96-acc6.c",
    "src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u96.c",
    "src/f16-rminmax/gen/f16-rmax-neonfp16arith-u8.c",
    "src/f16-rminmax/gen/f16-rmax-neonfp16arith-u16-acc2.c",
    "src/f16-rminmax/gen/f16-rmax-neonfp16arith-u24-acc3.c",
    "src/f16-rminmax/gen/f16-rmax-neonfp16arith-u32-acc2.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u8.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u16-acc1.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u16-acc2.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u24-acc2.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u24-acc3.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u24.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u32-acc2.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u32-acc4.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u32.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u64-acc2.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u64-acc4.c",
    "src/f16-rminmax/gen/f16-rmin-neonfp16arith-u64.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u8.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u16-acc1.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u16-acc2.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u24-acc2.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u24-acc3.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u24.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u32-acc2.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u32.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u64-acc2.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u64-acc4.c",
    "src/f16-rminmax/gen/f16-rminmax-neonfp16arith-u64.c",
    "src/f16-rsum/gen/f16-rsum-neonfp16arith-u8.c",
    "src/f16-rsum/gen/f16-rsum-neonfp16arith-u16-acc2.c",
    "src/f16-rsum/gen/f16-rsum-neonfp16arith-u24-acc3.c",
    "src/f16-rsum/gen/f16-rsum-neonfp16arith-u32-acc2.c",
    "src/f16-rsum/gen/f16-rsum-neonfp16arith-u32-acc4.c",
    "src/f16-spmm/gen/f16-spmm-8x1-minmax-neonfp16arith-pipelined.c",
    "src/f16-spmm/gen/f16-spmm-8x1-minmax-neonfp16arith-x2.c",
    "src/f16-spmm/gen/f16-spmm-8x1-minmax-neonfp16arith.c",
    "src/f16-spmm/gen/f16-spmm-16x1-minmax-neonfp16arith-pipelined.c",
    "src/f16-spmm/gen/f16-spmm-16x1-minmax-neonfp16arith-x2.c",
    "src/f16-spmm/gen/f16-spmm-16x1-minmax-neonfp16arith.c",
    "src/f16-spmm/gen/f16-spmm-24x1-minmax-neonfp16arith-pipelined.c",
    "src/f16-spmm/gen/f16-spmm-24x1-minmax-neonfp16arith-x2.c",
    "src/f16-spmm/gen/f16-spmm-24x1-minmax-neonfp16arith.c",
    "src/f16-spmm/gen/f16-spmm-32x1-minmax-neonfp16arith-x2.c",
    "src/f16-spmm/gen/f16-spmm-32x1-minmax-neonfp16arith.c",
    "src/f16-vbinary/gen/f16-vadd-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vaddc-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vmax-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vmaxc-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vmin-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vminc-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vmul-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vmulc-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vprelu-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vpreluc-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vrpreluc-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vrsubc-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vsqrdiff-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vsqrdiffc-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vsub-neonfp16arith-u8.c",
    "src/f16-vbinary/gen/f16-vsubc-neonfp16arith-u8.c",
    "src/f16-vclamp/gen/f16-vclamp-neonfp16arith-u8.c",
    "src/f16-vcmul/gen/f16-vcmul-neonfp16arith-u8.c",
    "src/f16-vcmul/gen/f16-vcmul-neonfp16arith-u32.c",
    "src/f16-velu/gen/f16-velu-neonfp16arith-rr1-p3-u8.c",
    "src/f16-vhswish/gen/f16-vhswish-neonfp16arith-u8.c",
    "src/f16-vlrelu/gen/f16-vlrelu-neonfp16arith-u8.c",
    "src/f16-vmulcaddc/gen/f16-vmulcaddc-c16-minmax-neonfp16arith-2x.c",
    "src/f16-vrnd/gen/f16-vrndd-neonfp16arith-u8.c",
    "src/f16-vrnd/gen/f16-vrndne-neonfp16arith-u8.c",
    "src/f16-vrnd/gen/f16-vrndu-neonfp16arith-u8.c",
    "src/f16-vrnd/gen/f16-vrndz-neonfp16arith-u8.c",
    "src/f16-vrsqrt/gen/f16-vrsqrt-neonfp16arith-rsqrt-u8.c",
    "src/f16-vrsqrt/gen/f16-vrsqrt-neonfp16arith-rsqrt-u32.c",
    "src/f16-vsigmoid/gen/f16-vsigmoid-neonfp16arith-rr2-p2-nr1fma-u8.c",
    "src/f16-vsigmoid/gen/f16-vsigmoid-neonfp16arith-rr2-p2-nr1fma-u16.c",
    "src/f16-vsigmoid/gen/f16-vsigmoid-neonfp16arith-rr2-p2-nr1fma-u24.c",
    "src/f16-vsigmoid/gen/f16-vsigmoid-neonfp16arith-rr2-p2-nr1recps-u8.c",
    "src/f16-vsigmoid/gen/f16-vsigmoid-neonfp16arith-rr2-p2-nr1recps-u24.c",
    "src/f16-vsigmoid/gen/f16-vsigmoid-neonfp16arith-rr2-p2-nr1recps-u32.c",
    "src/f16-vsqrt/gen/f16-vsqrt-neonfp16arith-nr1fma1adj-u16.c",
    "src/f16-vsqrt/gen/f16-vsqrt-neonfp16arith-nr1fma1adj-u32.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-nr1fma-u8.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-nr1fma-u16.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-nr1fma-u24.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-nr1recps-u8.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-nr1recps-u16.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-nr1recps-u24.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-nr1recps-u32.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-recpeadj-u8.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-recpeadj-u16.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-recpeadj-u24.c",
    "src/f16-vtanh/gen/f16-vtanh-neonfp16arith-expm1minus-rr1-p3h2ts-recpeadj-u32.c",
    "src/f16-vunary/gen/f16-vabs-neonfp16arith-u8.c",
    "src/f16-vunary/gen/f16-vneg-neonfp16arith-u8.c",
    "src/f16-vunary/gen/f16-vsqr-neonfp16arith-u8.c",
    "src/qd8-f16-qb4w-gemm/gen/qd8-f16-qb4w-gemm-1x16-minmax-neonfp16arith-mlal-lane-prfm.c",
    "src/qd8-f16-qb4w-gemm/gen/qd8-f16-qb4w-gemm-2x16-minmax-neonfp16arith-mlal-lane-prfm.c",
    "src/qd8-f16-qb4w-gemm/gen/qd8-f16-qb4w-gemm-2x16-minmax-neonfp16arith-mlal-lane.c",
    "src/qd8-f16-qb4w-gemm/gen/qd8-f16-qb4w-gemm-3x16-minmax-neonfp16arith-mlal-lane-prfm.c",
    "src/qd8-f16-qb4w-gemm/gen/qd8-f16-qb4w-gemm-3x16-minmax-neonfp16arith-mlal-lane.c",
    "src/qd8-f16-qb4w-gemm/gen/qd8-f16-qb4w-gemm-4x16-minmax-neonfp16arith-mlal-lane-prfm.c",
    "src/qd8-f16-qb4w-gemm/gen/qd8-f16-qb4w-gemm-4x16-minmax-neonfp16arith-mlal-lane.c",
    "src/qd8-f16-qb4w-gemm/gen/qd8-f16-qb4w-gemm-6x16-minmax-neonfp16arith-mlal-lane-prfm.c",
    "src/qd8-f16-qc4w-gemm/gen/qd8-f16-qc4w-gemm-1x16-minmax-neonfp16arith-mlal-lane-prfm.c",
    "src/qd8-f16-qc4w-gemm/gen/qd8-f16-qc4w-gemm-2x16-minmax-neonfp16arith-mlal-lane-prfm.c",
    "src/qd8-f16-qc4w-gemm/gen/qd8-f16-qc4w-gemm-2x16-minmax-neonfp16arith-mlal-lane.c",
    "src/qd8-f16-qc4w-gemm/gen/qd8-f16-qc4w-gemm-3x16-minmax-neonfp16arith-mlal-lane-prfm.c",
    "src/qd8-f16-qc4w-gemm/gen/qd8-f16-qc4w-gemm-3x16-minmax-neonfp16arith-mlal-lane.c",
    "src/qd8-f16-qc4w-gemm/gen/qd8-f16-qc4w-gemm-4x16-minmax-neonfp16arith-mlal-lane-prfm.c",
    "src/qd8-f16-qc4w-gemm/gen/qd8-f16-qc4w-gemm-4x16-minmax-neonfp16arith-mlal-lane.c",
    "src/qd8-f16-qc4w-gemm/gen/qd8-f16-qc4w-gemm-6x16-minmax-neonfp16arith-mlal-lane-prfm.c",
    "src/qs8-f16-vcvt/gen/qs8-f16-vcvt-neonfp16arith-u8.c",
    "src/qs8-f16-vcvt/gen/qs8-f16-vcvt-neonfp16arith-u16.c",
    "src/qs8-f16-vcvt/gen/qs8-f16-vcvt-neonfp16arith-u24.c",
]

ALL_NEONFP16ARITH_MICROKERNEL_SRCS = PROD_NEONFP16ARITH_MICROKERNEL_SRCS + NON_PROD_NEONFP16ARITH_MICROKERNEL_SRCS